method for fabricating capacitor in semiconductor device

专利摘要:
PURPOSE: A method for manufacturing a capacitor of semiconductor devices is provided to reduce an interface contact resistance and to improve capacitance. CONSTITUTION: A contact plug(12) is formed on a silicon substrate(11). After forming an interlayer dielectric(14) on the resultant structure, a contact hole is formed to expose the contact plug(12) by selectively etching the interlayer dielectric. A sidewall mask(17a) is formed at both sidewalls of the etched interlayer dielectric(14). The upper part of the contact plug(12) is partially etched so as to enhance surface area by using the sidewall mask(17a). At this time, a photoresist layer is used as the sidewall mask(17a). After removing the sidewall mask(17a), a lower electrode is then formed in the contact hole.
公开号:KR20030000824A
申请号:KR1020010036973
申请日:2001-06-27
公开日:2003-01-06
发明作者:전재영
申请人:주식회사 하이닉스반도체；
IPC主号:

专利说明:

Method for fabricating capacitor in semiconductor device
[9] The present invention relates to a semiconductor device, and more particularly to a method of manufacturing a capacitor of the semiconductor device.
[10] Hereinafter, a method of manufacturing a capacitor of a semiconductor device according to the prior art will be described.
[11] A transistor having a source / drain and a gate is formed on a silicon substrate, a contact plug is formed to contact the source of the transistor, and an interlayer insulating film is deposited on the entire surface of the substrate.
[12] Subsequently, after forming a hard mask on the interlayer insulating film, a hard mask pattern is formed by a photo process, and the interlayer insulating film is etched to expose the contact plug using the hard mask pattern as a mask to form contact holes.
[13] Thereafter, a capacitor lower electrode is formed in the contact hole, and a dielectric film and an upper electrode are sequentially formed on the capacitor lower electrode.
[14] The capacitor manufacturing method of the conventional semiconductor device as described above has the following problems.
[15] When the contact hole is formed so that the contact plug is exposed, the loss of the contact plug is small, so that the surface area is small, thereby limiting the improvement of capacitance.
[16] The present invention has been made to solve the above problems, and an object of the present invention is to provide a capacitor manufacturing method of a semiconductor device suitable for reducing interfacial contact resistance and improving capacitance.
[1] 1A to 1F are cross-sectional views illustrating a method of manufacturing a capacitor of a semiconductor device according to an embodiment of the present invention.
[2] Figure 2 is a cross-sectional photograph after the process in accordance with Figure 1c
[3] Explanation of symbols on the main parts of the drawings
[4] 11 silicon substrate 12 contact plug
[5] 13 nitride film 14 interlayer insulating film
[6] 15: hard mask 16: the first photosensitive film
[7] 17 second photosensitive film 17a sidewall photosensitive film
[8] 18: capacitor lower electrode
[17] According to another aspect of the present invention, there is provided a method of manufacturing a capacitor of a semiconductor device, the method including: forming a contact plug to be in contact with a region of a substrate; Etching the interlayer insulating layer to expose the contact plug, forming a contact hole, forming a sidewall mask on the sidewall of the interlayer insulating layer on the side of the contact hole, and forming an upper portion of the contact plug by using the sidewall mask. Etching to increase the surface area, removing the sidewall mask, forming a capacitor lower electrode in the contact hole so as to contact the contact plug, and removing the interlayer insulating layer leaving only the capacitor lower electrode. And forming a dielectric film and an upper electrode on the capacitor lower electrode. And a gong.
[18] Referring to the accompanying drawings, a method for manufacturing a capacitor of a semiconductor device according to the present invention will be described.
[19] 1A to 1F are cross-sectional views illustrating a method of manufacturing a capacitor of a semiconductor device according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional photograph after the process of FIG. 1C is performed.
[20] In the capacitor manufacturing method of the semiconductor device according to the present invention, as shown in FIG. 1A, a transistor having a source / drain and a gate is formed on the silicon substrate 11, and sidewall spacers are formed on both sides of the gate.
[21] Thereafter, a contact plug 12 is formed on the silicon substrate 11 to be in contact with the source of the transistor.
[22] Then, a nitride film 13 serving as an etch stop layer is deposited on the entire surface including the contact plug 12 and the lower transistor, and an interlayer insulating film 14 for determining the height of the capacitor is deposited thereon. The hard mask 15 is deposited on 14.
[23] In this case, the hard mask 15 is formed of polysilicon, and is formed for etching the interlayer insulating film 14 having a high thickness in a capacitor photoforming process.
[24] Next, the first photoresist film 16 is applied onto the hard mask 15 and then selectively patterned so that the capacitor formation region is subsequently removed using an exposure and development process.
[25] As shown in FIG. 1B, when the hard mask 15 is etched using the patterned first photoresist layer 16 as a mask, and the contact plug 12 is exposed using the first photoresist layer 16 and the hard mask 15 as a mask. Until then, the interlayer insulating film 14 and the nitride film 13 are etched sequentially to form contact holes. Thereafter, the first photoresist film 16 and the hard mask 15 are removed.
[26] Next, a second photosensitive film 17 is coated on the surface of the contact hole and the interlayer insulating film 14.
[27] As shown in FIG. 1C, the second photoresist layer 17 is etched to form the sidewall photoresist layer 17a on the side surface of the interlayer insulating layer 14 in the contact hole, so that the contact plug 12 is exposed. The cross-sectional photograph after such a process progress is shown in FIG.
[28] Thereafter, the upper portion of the contact plug 12 is etched by a predetermined thickness using the sidewall photoresist 17a as a mask.
[29] At this time, the upper portion of the contact plug 12 is to be etched within approximately 1000 kPa, the etching gas is a gas mixed with Cl2 and N2.
[30] Accordingly, the upper portion of the contact plug 12 is bent (ie, recessed) and etched to increase the upper surface area.
[31] Thereafter, as shown in FIG. 1D, the sidewall photosensitive film 17a is removed.
[32] By removing the upper part of the contact plug 12 as described above, it is possible to make stable contact with the capacitor lower electrode later, and to increase the contact area with the capacitor lower electrode later by increasing the upper surface area, thereby improving capacitance. Will be.
[33] As shown in FIG. 1E, after depositing a material for forming a capacitor lower electrode on the front surface to contact the contact plug 12, an etch back or chemical mechanical polishing process is performed to form the capacitor lower electrode 18 along the contact hole side. .
[34] As shown in FIG. 1F, the interlayer insulating film 14 and the nitride film 13 except for the capacitor lower electrode 18 are sequentially removed.
[35] Although not shown in the drawings, a dielectric film and a capacitor upper electrode are formed along the capacitor lower electrode 18.
[36] The capacitor manufacturing method of the semiconductor device of the present invention as described above has the following effects.
[37] The contact stability between the contact plug and the lower electrode of the capacitor can be improved, and the contact area can be increased to reduce the Rc between the cells, that is, the contact resistance, thereby improving the electrical characteristics.
[38] In addition, by removing a part of the upper portion of the contact plug to have a recess, there is an effect of increasing the capacitance.

权利要求:
Claims (5)
[1" claim-type="Currently amended] Forming a contact plug to be in contact with one region of the substrate;
Forming an interlayer insulating film on the entire surface of the substrate including the contact plugs;
Forming a contact hole by etching the interlayer insulating layer so that the contact plug is exposed;
Forming a sidewall mask on sidewalls of the interlayer insulating film on the side of the contact hole;
Etching the upper portion of the contact plug by using the sidewall mask to increase a surface area;
Removing the sidewall mask;
Forming a capacitor lower electrode in the contact hole to contact the contact plug;
Removing the interlayer insulating layer leaving only the capacitor lower electrode;
And forming a capacitor dielectric film and a capacitor upper electrode on the capacitor lower electrode.
[2" claim-type="Currently amended] The method of claim 1,
The sidewall mask is a capacitor manufacturing method of a semiconductor device, characterized in that formed using a photosensitive film.
[3" claim-type="Currently amended] The method of claim 1,
And a mixed gas of Cl2 + N2 when etching the contact plug using the sidewall mask.
[4" claim-type="Currently amended] The method of claim 1,
And depositing an etch stop layer on a lower portion of the semiconductor device before depositing the interlayer dielectric layer.
[5" claim-type="Currently amended] The method of claim 1,
And forming a hard mask pattern on the interlayer insulating layer to form a contact hole by etching the interlayer insulating layer to form a contact hole.

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同族专利:

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引用文献:

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公开号 | 申请日 | 公开日 | 申请人 | 专利标题

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法律状态:
2001-06-27|Application filed by 주식회사 하이닉스반도체

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2001-06-27|Priority to KR1020010036973A

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2003-01-06|Publication of KR20030000824A

优先权:

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申请号 | 申请日 | 专利标题

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KR1020010036973A|KR20030000824A|2001-06-27|2001-06-27|method for fabricating capacitor in semiconductor device|